1. Field of Invention
The present invention relates to a current mirror circuit and more particularly a low noise and high accuracy current mirror circuit for audio applications.
2. Description of Related Art
In audio applications such as can be found in mobile phones producing an analog signal from a digital signal that can then be heard by the human ear requires a wide conversion range, i.e. twenty-four bits. This is often done with a current steering circuit where a sigma-delta DAC (digital to analog converter) with a low resolution DAC and a modulator drives a current mirror circuit. The current mirror circuit works in conjunction with the DAC to translate a digital code into a current centered around zero by taking the output from the current mirror circuit, whose input was driven by one output from the DAC and subtract it from the second output current from the DAC. When the output from the current mirror circuit does not perfectly match the input current to the current mirror circuit from the DAC, a residual error current results. The output current from the current mirror and DAC circuit is converted to a voltage that is passed to a substantial gain in subsequent circuitry in the audio signal path. This becomes a problem when there is no digital input signal and the error current is converted to a voltage, which is applied to the sound-producing device and places an added stress on the coils of the earphone or other sound producing devices driven by the subsequent audio circuitry. It is critical that the current steering design have an accuracy, which produces a current when converted to a voltage that is interpreted by the subsequent elements of the audio path as being zero for the digital input code which represents zero. Since the current steering design is a differential output, where the output of the current mirror circuit is subtracted from an output of the DAC, it is critical that the current mirror circuit produce an accurate copy of the input current to the current mirror circuit to minimize or eliminate the error current when there is no digital input to the DAC. Since the current mirror circuit is operating with a high current relative to the desired input referred error current, i.e. in the range of a milliampere for the DC current within the current mirror when there is no digital input signal, there is not only a need for good matching of transistor devices but also a matching of the impedance of metallization carrying the high current and a matching of the values of voltage distributed to the transistor devices. Common elements in the circuitry can be handled by the design, and non-common elements require critical matching so as to produce a proper result in the down stream signal, i.e. zero volts when the digital signal is the code which represents zero.
U.S. Pat. No. 6,472,858 B1 (Tanase) is directed to low voltage fast settling precision current mirrors and methods using a first and a second current mirror circuit where the output of the two current mirrors are coupled such that the output receives a part of the mirrored current from each current mirror. In U.S. Pat. No. 5,212,458 (Fitzpatrick et al.) a current mirror design is directed to a compensation circuit, which automatically adjusts the operating conditions of the current mirror. U.S. Pat. No. 4,329,639 is directed to a high accuracy current mirror circuit comprising low beta transistors and operating on a low supply voltage.